signal delay造句
例句與造句
- Effect of atmosphere on satellite navigation signal delay and correction method
大氣層對衛(wèi)星導航信號的時延影響及修正 - ( 4 ) the signal delay commission is done well by the controller
( 4 )所設計的信號延時系統(tǒng)能夠穩(wěn)定、準確的完成信號延時工作。 - Absolute signal delay
絕對信號延時 - The influence of the multi - layer cabling structure in integrated circuit on the signal delay
大規(guī)模集成電路多層布線結構對信號延時的影響 - By analysis , we have found that the output of if dsss / bpsk signal delay and multiplication processing is composed of
該法處理輸出的頻譜包含寬帶成分導致其載頻估計能力較差。 - It's difficult to find signal delay in a sentence. 用signal delay造句挺難的
- The drawbacks of the former one are that higher power is required to reach a satellite at that distance and a substantial round trip signal delay is inevitable
前者的缺點是由于距離較遠因而要求較大的信號功率以及存在較長的信號延遲,而后者則由于衛(wèi)星數(shù)目巨大而費用昂貴。 - The hardware system is consisted of ccd camera , video capture card , pcl - 731a digital input / output card , signal delay controller , industry computer and outside executing set
系統(tǒng)硬件部分由ccd彩色攝像頭、圖像采集卡、 pcl - 731a數(shù)字量i o卡、信號延時器、工業(yè)用計算機和外部執(zhí)行機構組成。 - The research object of traditional dm method is the output of base - band dsss / bpsk signal delay and multiplication processing or the base - band component of output of if dsss / bpsk signal delay and multiplication processing
傳統(tǒng)的延遲相乘法研究對象是基帶信號的延遲相乘輸出,或中頻信號延遲相乘輸出的基帶部分。 - This logic is designed containing input signal delay , event type classification , event pre - scaling and timing logic and works in pipeline mode under control of 20mhz clock which ensures no dead time contribution
主觸發(fā)邏輯在20m時鐘下以流水線的方式工作，保證沒有死時間的產生。第二個例子是任意數(shù)字信號發(fā)生器的設計。 - But it can " t fit transmission for some distance because of many cables , having difficulties in controlling signals delay , high price and interference rising . so , we adopt the serial transmission for long distance transmission
但并行傳輸技術對于一定距離傳輸則不是最佳選擇，由于并行傳輸需要的傳輸電纜多，信號延時控制困難，這樣不僅成本高，而且干擾也會增大。 - When the egg - reached signal is sent to pc , through i / o card , the pc drives the video card to capture one frame picture to ram . after a series of mathematical analysis , the pc send the yolk color ' s or egg size ' s grading signals to outer signal delayed controller by i / o card again . last , the controller sends the delayed signals to outer execute equipment to finish classifying
蛋已到達光室的控制信號由數(shù)字量i o卡輸入到計算機；計算機通過對端口的查詢獲知這一信號后立刻驅動圖像采集卡將當前光室中的一幀圖像采集到主機內存中，進行相應的計算分析后將光室中鴨蛋蛋芯顏色或大小分級信號再經由數(shù)字量輸入輸出卡，送至外部信號延時控制器；控制器將此信號延時后送至外部執(zhí)行機構，完成分級動作。 - Wirings of the poly layer are always utilized under the silicon grid technics . to control the macro - cell signal delay and improve signal integrality , the crossing among different nets must be averagely distributed to reduce the number of layer permutation . the metal layer wirings should be maximized and the length of poly layer wiring in each net should be minimized
硅柵工藝晶體管級布線利用多晶層走線，為了控制宏單元時延性能及改善信號完整性形態(tài)，關鍵是不同線網間交叉的均衡分配以減少走線的換層次數(shù)，最大化金屬層走線以及每一線網多晶層走線長度的有效控制。 - For high stability of the system , with the realization of hardware of the system , the second part of this paper starts from the transmission line theory , and studies the signal integrity problem of high - speed circuit system in light current . the causes of these signal integrity problems , such as signal delay , reflection , crosstalk , ground bounce noises and etc . are analyzed in theory . combined with actual design , key points of design and standard design flow of general high - speed , high - precision printed circuit board are summarized , which has been applied in actual system , and good effect has been achieved
為使系統(tǒng)具有較高的穩(wěn)定性，本文第二部分結合該處理器的硬件實現(xiàn)，從傳輸線理論出發(fā)，研究了弱電情況下高速電路印刷電路板中的信號完整性問題；從理論上分析了延遲、反射、串擾以及地彈噪聲等信號完整性問題產生的原因；結合實際設計，總結了一般高速、高精度印刷電路板的設計要點和標準設計流程，并在實際系統(tǒng)中獲得了應用，取得了很好的效果。